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JEDEC JEP156
- CHIP-PACKAGE INTERACTION UNDERSTANDING, IDENTIFICATION AND EVALUATION
- standard by JEDEC Solid State Technology Association, 03/01/2009
- Publisher: JEDEC
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This publication references a set of frequently recommended and accepted JEDEC reliability stress tests. These tests are used for qualifying new and modified technology/ process/ product families, as well as individual solid state surface-mount products.
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