• JEDEC JESD22-B112A
Provide PDF Format

Learn More

JEDEC JESD22-B112A

  • PACKAGE WARPAGE MEASUREMENT OF SURFACE-MOUNT INTEGRATED CIRCUITS AT ELEVATED TEMPERATURE
  • standard by JEDEC Solid State Technology Association, 10/01/2009
  • Publisher: JEDEC

$37.00$74.00


The purpose of this test method is to measure the deviation from uniform flatness of an integrated circuit package body for the range of environmental conditions experienced during the surface-mount soldering operation.

Related Products

JEDEC JP 002

JEDEC JP 002

CURRENT TIN WHISKERS THEORY AND MITIGATION PRACTICES GUIDELINE..

$36.00 $72.00

JEDEC JESD80

JEDEC JESD80

STANDARD FOR DESCRIPTION OF 2.5 V CMOS LOGIC DEVICES..

$24.00 $48.00

JEDEC JESD 8-9B

JEDEC JESD 8-9B

ADDENDUM No. 9B to JESD8 - STUB SERIES TERMINATED LOGIC FOR 2.5 VOLTS (SSTL_2): Includes Errata and ..

$36.00 $72.00

JEDEC JEP143C

JEDEC JEP143C

SOLID STATE RELIABILITY ASSESSMENT QUALIFICATION METHODOLOGIES..

$38.00 $76.00