• Your shopping cart is empty!

  • JEDEC JESD76
Provide PDF Format

Learn More

JEDEC JESD76

  • DESCRIPTION OF 1.8 V CMOS LOGIC DEVICES
  • standard by JEDEC Solid State Technology Association, 04/01/2000
  • Publisher: JEDEC

$24.00$48.00


This standard continues the voltage specification migration to the next level beyond the 2.5 V specification already established in JESD80. In this standard, the input and output conditions are described for CMOS Logic products in a 1.8 V (Normal Range) application.

Product Details

Published:
04/01/2000
Number of Pages:
8
File Size:
1 file , 51 KB

Related Products

JEDEC JESD75-4

JEDEC JESD75-4

BALL GRID ARRAY PINOUT FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS..

$27.00 $53.00

JEDEC JEP69-B (R1999)

JEDEC JEP69-B (R1999)

PREFERRED LEAD CONFIGURATION FOR FIELD-EFFECT TRANSISTORS..

$24.00 $48.00

JEDEC JESD 27

JEDEC JESD 27

CERAMIC PACKAGE SPECIFICATION FOR MICROELECTRONIC PACKAGES..

$44.00 $87.00

JEDEC JEP114.01

JEDEC JEP114.01

GUIDELINES FOR PARTICLE IMPACT NOISE DETECTION (PIND) TESTING, OPERATOR TRAINING, AND CERTIFICATION..

$39.00 $78.00